sureCore Ltd. announces a low-power, SRAM IP, application-centric, customization service that delivers specific power and performance requirements for wearable, wireless, augmented reality and IoT devices whose requirements go beyond standard low-power memory IP.
sureCore's application-centric, patented and silicon-proven, low-power design techniques prioritize power optimization over speed and area. The new service covers a wide spectrum of memory requirements covering multiple read/write ports, ultra-low leakage retention modes, low dynamic power, near-threshold operation, write masking and BIST/DFT support.
The sureCore service develops memory variants including SRAM and Register Files based on either standard foundry or custom bit cells, the latter capable of delivering ultra-low operating voltages, improved leakage characteristics and improved performance.
The application-centric service is rooted in sureCore's innovative design approach and innovative memory architectures that include:
- Segmented arrays and bit line voltage control that delivers optimal dynamic power and performance.
- SMART-Assist circuitry for near-threshold operation across process and temperature extremes.
- Highly granular sleep modes, coupled with independent sub-banks.
- Custom single and multi-port bit cells.
- Pipelined read circuitry that meets demanding performance goals.
"Today's emerging markets aren't playing by yesterday's rules and SoC architects developing cutting edge low-power devices can no longer make do with standard memory IP," explains Eric Gunn, sureCore's Chief Operating Officer.
"A number of companies have come to us with very ultra-low, application-specific power and performance targets that demand "out-of-the-box" thinking to achieve record-setting energy efficiency," says sureCore's CEO, Paul Wells.
The new customization service produces results based on a rigorous verification regime, which incorporates statistical, parametric and physical validation, and ensures that sureCore's application-centric memories meet demanding quality requirements. Design flows based on industry-leading, memory characterization tooling delivers multiple PVT corners quickly, accurately and automatically. All industry-standard EDA views are supported.