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SiliconFile Chooses Berkeley Design Automation’s Platform for Image Sensor ICs Verification

Berkeley Design Automation announced that SiliconFile Technologies has chosen the AFS (Analog FastSPICE unified circuit verification) platform for verifying its image sensor integrated circuits. SiliconFile, a provider of CMOS image sensors, selected the platform for complex-block verification of ICs for use in mobile imaging.

Berkeley - Performance graph of AFS Platform

The AFS Platform is an exclusive unified circuit verification platform for RF, mixed-signal, and analog design. The platform provides detailed device noise analysis, and more than 10 million-element capacity, while delivering 5 - 20 times better performance than conventional SPICE.

The platform uses numerical analysis and advanced algorithms to solve the original device and full-circuit matrix equations quickly, without using any shortcuts. The platform comprises licenses for AFS RF Analysis, AFS Transient Noise Analysis, AFS Co-Simulation, AFS circuit simulation, and AFS Nano SPICE simulation.

SiliconFile’s Chief Technology Officer, Do Yeong Lee, stated that the company chose the AFS platform because it provided accurate nanometer SPICE results 5 -10 times faster than conventional SPICE simulators. The President of Berkeley Design Automation, Ravi Subramanian, expressed their pleasure over SiliconFile Technologies’ selection of the AFS platform.

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